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Configure STM PWM
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This example shows how to configure the TIM1 peripheral to generate 7 PWM signals with 4 different duty cycles (50%, 37.5%, 25% and 12.5%). TIM1CLK = SystemCoreClock, Prescaler = 0, TIM1 counter clock = SystemCoreClock SystemCoreClock is set to 72 MHz for Low-density, Medium-density, High-density and Connectivity line devices. For Low-Density Value line, Medium-Density and High-density Value line devices, SystemCoreClock is set to 24 MHz.
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