Home » Source Code » VHDL for 16 bit Time Domain Convolution

VHDL for 16 bit Time Domain Convolution

liyangddd
2013-09-27 07:08:14
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Description

Convolution is a common operation in digital signal processing. In this project, I created a custom circuit implemented on the Nallatech board that exploits a significant amount of parallelism to improve performance compared to a microprocessor. Convolution takes as input a signal and a kernell The output is another signal, where each element of the output signal is the sum of the products formed by multiplying all the element of  the kernel with appropriate element of the input signal. 16 bit unsigned interger operations is used, the FPGA will store the input signal in SRAM and will read in a kernel through the memory map.
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File list

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Name Size Date
add.vhd621.00 B20-11-12 13:53
addr_gen.vhd2.24 kB06-12-12 12:57
add_reg.vhd1.44 kB20-11-12 13:55
ctrl.vhd2.70 kB28-11-12 22:03
datapath.vhd4.65 kB04-12-12 17:55
datapath_top.vhd1.56 kB06-12-12 16:07
fifo_in.ngc78.21 kB28-11-12 22:02
fifo_in.vhd5.58 kB28-11-12 22:01
fifo_out.ngc70.23 kB28-11-12 22:01
fifo_out.vhd5.50 kB28-11-12 22:02
flip_flop.vhd857.00 B27-10-12 13:07
flip_flop1.vhd1,002.00 B19-11-12 10:58
handshake.vhd3.76 kB06-12-12 14:27
kernel_buffer.vhd1.48 kB19-11-12 00:07
mem_pkg.vhd2.30 kB28-11-12 22:01
mmap_glue_logic.vhd3.70 kB06-12-12 16:57
multiplier.vhd1.15 kB20-11-12 10:37
reg.vhd1.21 kB26-10-10 15:09
reg_n_bit.vhd918.00 B10-11-12 11:06
shifter.vhd1.62 kB04-12-12 17:43
sram_out_logic.vhd1.42 kB06-12-12 16:25
sram_rd.vhd4.32 kB06-12-12 20:01
sram_rd_glue.vhd1.60 kB06-12-12 16:14
sram_test_h101.dtc20.57 kB06-12-12 17:09
sram_test_h101.vhd5.84 kB06-12-12 14:30
sram_wr.vhd4.19 kB06-12-12 19:46
user_app.vhd3.79 kB06-12-12 16:57
user_pkg.vhd1.95 kB28-11-12 22:02
<Convolution>0.00 B06-12-12 20:29
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Comments

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1620121046
2016-01-20

this code was very useful in the implementation of my project and in succes to complete the project in

m.taahaa
2016-04-25

Does the multiplier work for signed numbers?>

ashokf9
2017-06-13

well done marvelous bro keep working.....

Shubh68
2017-10-10

ok

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VHDL for 16 bit Time Domain Convolution (65.78 kB)

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