bcd7-segment
2016-08-23
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LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
ENTITY bcd IS PORT (
SW : IN STD_LOGIC_VECTOR (3 DOWNTO 0);
HEX1 : OUT STD_LOGIC_VECTOR (1 TO 7));
END bcd;
ARCHITECTURE behavioral OF bcd IS
CONSTANT NOL : STD_LOGIC_VECTOR(3 DOWNTO 0) := "0000";
CONSTANT SATU : STD_LOGIC_VECTOR(3 DOWNTO 0) := "0001";
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
ENTITY bcd IS PORT (
SW : IN STD_LOGIC_VECTOR (3 DOWNTO 0);
HEX1 : OUT STD_LOGIC_VECTOR (1 TO 7));
END bcd;
ARCHITECTURE behavioral OF bcd IS
CONSTANT NOL : STD_LOGIC_VECTOR(3 DOWNTO 0) := "0000";
CONSTANT SATU : STD_LOGIC_VECTOR(3 DOWNTO 0) := "0001";
vhdl
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