implementation of fft core using vhdl
2016-08-23
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This document is the report of the semester-long project undertaken as part of the VLSI Design Lab course (EC354). Our project is the full custom design of a 4-bit 8-point FFT (Fast Fourier Transform) core. The type of FFT implemented is DIF (Decimation In Time) FFT.
This document aims to provide not just an overview of the project implementation, but also important details regarding how we went implementing the different parts of the project. The necessary block diagrams, screenshots of the schematics, layouts as well as the various data and control signal have been included. In addition to this, the VHDL codes are also included.
This document aims to provide not just an overview of the project implementation, but also important details regarding how we went implementing the different parts of the project. The necessary block diagrams, screenshots of the schematics, layouts as well as the various data and control signal have been included. In addition to this, the VHDL codes are also included.
vhdl
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