verilog FIR
2016-08-23
0 0 0
no vote
Other
Earn points
FIR filter design is a communication of the Verilog code, can be used in the project. This is a cosine function 50 litre filter attenuation greater than 50dB, ripple is 0.3dB.
verilog
verilogfir
Related Source Codes
AXI Host Slave Function Model
0
0
no vote
Axi slave to fifo code
0
0
no vote
DMA Controller Based on AHB
0
0
no vote
Verilog implementation of ldpc code
0
0
no vote
Minimum sum decoding
0
0
no vote
No comment