DDC DDC design Verilog
2016-08-23
5 0 0
no vote
Other
Earn points
DDC DDC design Verilog source code, after the actual validation. The values obtained by table look-up method COS,sin, ROM COS.v, Sin.v DDS direct digital frequency, digital down-converter. And VHDL source code;
Worth doing RF baseband reference, requires some knowledge of software-defined radio.
Worth doing RF baseband reference, requires some knowledge of software-defined radio.
verilog
Related Source Codes
AXI Host Slave Function Model
0
0
no vote
Axi slave to fifo code
0
0
no vote
DMA Controller Based on AHB
0
0
no vote
Verilog implementation of ldpc code
0
0
no vote
Minimum sum decoding
0
0
no vote
No comment