Home » Source Code » Tiny Microcontroller for FPGAs A

Tiny Microcontroller for FPGAs A

yijingjing
2015-07-08 01:53:43
The author
View(s):
Download(s): 0
Point (s): 1 
Category Category:
嵌入式系统嵌入式系统 Verilog HDLVerilog

Description

is a tiny microcontroller that is optimized for AbstractLow-cost FPGAs. Leros is designed with a balanced logic currentOn-chip memory relation. The design goal is a microcontroller toCan be clocked in about half of the speed a pipelined on-chip thatAnd consuming less than logic 300 cells. memoryArchitecture which, follows from the design goals is, a The16-bit accumulator processor. An implementation of pipelinedNeeds at least one on-chip memory block and a few hundred LerosCells. logicApplication areas of Leros are twofold: First it, can be used TheAn intelligent peripheral device for auxiliary functions in an asBased system-on-chip design. Second the, very small size FPGALeros makes it an attractive softcore for many-core research ofLow-cost FPGAs. with

Key Technology

Smallest; core is comparable to Leros and can be implemented The Less than LCs. 700 It is a sequential implementation and inInstruction takes at least clock 6 cycles. Leros is a smaller each(16-bit), architecture and full pipelining accumulator-basedTo execute each instruction in a single clock cycle. allowsSuper small processor [9] is optimized for low resource TheConsumption (of the NIOS economy version Resources). HalfReduced by serializing ALU operations to single bit operations. areLC consumption is comparable with Leros but, the TheMemory consumption is not reported. on-chip
Sponsored links

File list

Tips: You can preview the content of files by clicking file names^_^
Name Size Date
blink.asm698.00 B05-09-11|21:52
branch.asm545.00 B05-09-11|21:52
echo.asm305.00 B05-09-11|21:52
hello.asm596.00 B05-09-11|21:52
jal.asm399.00 B05-09-11|21:52
loadstore.asm288.00 B05-09-11|21:52
test.asm252.00 B05-09-11|21:52
design-blog.txt2.35 kB08-11-12|15:28
leros.pdf126.63 kB05-09-11|21:52
lerosjvm.pdf328.79 kB22-09-11|05:42
notes.txt862.00 B05-09-11|21:52
Hello.java2.10 kB11-03-12|03:05
Blink.java2.19 kB22-09-11|06:01
Native.java2.33 kB11-03-12|03:05
MuviumRunnable.java1.89 kB22-09-11|05:42
DrawLine.java5.74 kB10-03-12|03:02
Serializable.java53.00 B10-03-12|07:53
Object.java2.86 kB22-09-11|05:42
Runnable.java1.79 kB22-09-11|05:42
String.java1.77 kB22-09-11|05:42
TestNoc.java822.00 B10-03-12|07:53
ButtonOFF.png2.27 kB22-09-11|05:42
ButtonON.png2.17 kB22-09-11|05:42
LedOFF.png3.31 kB22-09-11|05:42
LedON.png5.84 kB22-09-11|05:42
Muvium.ico12.95 kB22-09-11|05:42
MuviumICON16.png754.00 B22-09-11|05:42
MuviumLOGO.png1.45 kB22-09-11|05:42
Leros.g5.96 kB22-09-11|05:42
LerosAsm.java5.61 kB22-09-11|05:42
ILerosIO.java134.00 B22-09-11|05:42
LerosIO.java2.88 kB11-03-12|03:05
LerosSim.java7.26 kB22-09-11|05:42
QuickIO.java5.73 kB22-09-11|05:42
jikes.exe2.51 MB10-03-12|07:53
config.xml342.00 B05-09-11|21:52
jaxen.jar221.60 kB05-09-11|21:52
jdom.jar149.22 kB05-09-11|21:52
Leros.jar49.18 kB10-03-12|07:53
Muvium-Leros.jar378.75 kB10-03-12|07:53
makeLeros.bat258.00 B22-09-11|05:42
makeNativeEcho.bat234.00 B22-09-11|05:42
Native.java126.00 B22-09-11|05:42
NativeEcho.java399.00 B22-09-11|05:42
runBlink.bat1.04 kB22-09-11|05:42
antlr-3.3-complete.jar1.85 MB05-09-11|21:52
Makefile3.88 kB15-03-12|07:24
Makefile750.00 B05-09-11|21:52
sim.do66.00 B05-09-11|21:52
wave.do2.82 kB05-09-11|21:52
leros.cdf283.00 B05-09-11|21:52
leros.qpf1.24 kB05-09-11|21:52
leros.qsf4.68 kB05-09-11|21:52
leros.sdc1.24 kB05-09-11|21:52
leros.qpf1.24 kB05-09-11|21:52
leros.qsf11.53 kB05-09-11|21:52
leros.sdc1.24 kB05-09-11|21:52
leros.qpf1.24 kB05-09-11|21:52
leros.qsf3.73 kB05-09-11|21:52
leros.sdc1.27 kB05-09-11|21:52
memfmax.qsf2.44 kB05-09-11|21:52
memfmax.sdc348.00 B05-09-11|21:52
README244.00 B05-09-11|21:52
test.txt26.00 B05-09-11|21:25
USBRunner.exe33.44 kB05-09-11|21:52
.libraries.xml371.00 B05-09-11|21:52
.project1.15 kB08-11-12|15:28
cyc2_pll.vhd5.69 kB05-09-11|21:52
cyc3_pll.vhd5.64 kB05-09-11|21:52
cyc_pll.vhd2.49 kB05-09-11|21:52
leros.vhd2.44 kB05-09-11|21:52
leros_decode.vhd3.56 kB05-09-11|21:52
leros_ex.vhd5.37 kB05-09-11|21:52
leros_fedec.vhd4.56 kB05-09-11|21:52
leros_im.vhd3.32 kB05-09-11|21:52
leros_types.vhd3.40 kB05-09-11|21:52
uart.vhd9.76 kB05-09-11|21:52
tb_leros.vhd2.28 kB05-09-11|21:52
memfmax.vhd3.18 kB05-09-11|21:52
leroscyc12.vhd4.12 kB05-09-11|21:52
leros_de2-70.vhd3.66 kB11-03-12|03:05
leros_nexys2.vhd3.43 kB05-09-11|21:52
sp3epll.vhd3.18 kB05-09-11|21:52
fmax.gise1.03 kB14-05-15|15:55
fmax.xise39.03 kB14-05-15|15:55
fmax_ise12migration.zip5.36 kB14-05-15|15:55
fmax.projectmgr4.24 kB14-05-15|15:55
leros_nexys2.xreport20.36 kB14-05-15|15:55
leros_nexys2_summary.html3.45 kB14-05-15|15:55
pn_parser.xmsgs2.37 kB14-05-15|15:55
memtest.xise37.53 kB05-09-11|21:52
nexys2.xise33.59 kB05-09-11|21:52
general.ucf120.00 B05-09-11|21:52
leros_nexys2.ucf2.01 kB05-09-11|21:52
Nexys2_500General.ucf18.24 kB05-09-11|21:52
leros0.00 B14-05-15|15:45
muvium0.00 B14-05-15|15:45
io0.00 B14-05-15|15:45
lang0.00 B14-05-15|15:45
asm0.00 B14-05-15|15:45
sim0.00 B14-05-15|15:45
asm0.00 B14-05-15|15:45
sim0.00 B14-05-15|15:45
com0.00 B14-05-15|15:45
java0.00 B14-05-15|15:45
grammar0.00 B14-05-15|15:45
leros0.00 B14-05-15|15:45
grammar0.00 B14-05-15|15:45
leros0.00 B14-05-15|15:45
src0.00 B14-05-15|15:45
images0.00 B14-05-15|15:45
src0.00 B14-05-15|15:45
iseconfig0.00 B14-05-15|15:55
_xmsgs0.00 B14-05-15|15:55
examples0.00 B14-05-15|15:45
src0.00 B14-05-15|15:45
target0.00 B14-05-15|15:45
tools0.00 B14-05-15|15:45
lib0.00 B14-05-15|15:45
altde2-700.00 B14-05-15|15:45
dspio0.00 B14-05-15|15:45
fmax0.00 B14-05-15|15:45
memtest0.00 B14-05-15|15:45
altera0.00 B14-05-15|15:45
core0.00 B14-05-15|15:45
io0.00 B14-05-15|15:45
simulation0.00 B14-05-15|15:45
test0.00 B14-05-15|15:45
top0.00 B14-05-15|15:45
xilinx0.00 B14-05-15|15:45
fmax0.00 B14-05-15|15:55
memtest0.00 B14-05-15|15:45
nexys20.00 B14-05-15|15:45
ucf0.00 B14-05-15|15:45
asm0.00 B14-05-15|15:45
doc0.00 B14-05-15|15:45
java0.00 B14-05-15|15:45
jikes0.00 B14-05-15|15:45
LerosMuviumSDK0.00 B14-05-15|15:45
lib0.00 B14-05-15|15:45
modelsim0.00 B14-05-15|15:45
quartus0.00 B14-05-15|15:45
vhdl0.00 B14-05-15|15:45
xilinx0.00 B14-05-15|15:45
trunk0.00 B14-05-15|15:45
...
Sponsored links

Comments

(Add your comment, get 0.1 Point)
Minimum:15 words, Maximum:160 words
  • 1
  • Page 1
  • Total 1

Tiny Microcontroller for FPGAs A (3.47 MB)

Need 1 Point(s)
Your Point (s)

Your Point isn't enough.

Get 22 Point immediately by PayPal

Point will be added to your account automatically after the transaction.

More(Debit card / Credit card / PayPal Credit / Online Banking)

Submit your source codes. Get more Points

LOGIN

Don't have an account? Register now
Need any help?
Mail to: support@codeforge.com

切换到中文版?

CodeForge Chinese Version
CodeForge English Version

Where are you going?

^_^"Oops ...

Sorry!This guy is mysterious, its blog hasn't been opened, try another, please!
OK

Warm tip!

CodeForge to FavoriteFavorite by Ctrl+D