Improve the throughput of Karatsuba AES-GCM FPGA o
2016-08-23
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Application background
In this paper, we presented the throughput improvement of AES-GCM with pipelinedKaratsuab-Ofman based finite field multipliers.With our proposed 4-stage sub-quadratic
finite field multipliers, the GHASH function is not the bottleneck any more in GCM
hardware systems, no matter which one of the three AES implementations is selected
Improving Throughput of AES-GCM with Pipelined Karatsuba Multipliers 203
(BlockRAM based SubBytes, composite field SubBytes or LUT-based SubBytes). The
presented AES-GCM cores reach the throughput of 31Gbps and 39Gbps on Virtex4
and Virtex5, respectively. The experimental results show that a single modern FPGA
chip can provide the throughput of more than 30Gbps for the authenticated AES-GCM,
which exhibits the advantage of field programmable devices in high performance computing
systems.
Key Technology
Two main componentsvhdl
流水线
提高
吞吐量
乘法器
FPGAKaratsubaAESGCM
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