Uart-gen.rar
2016-08-23
0 0 0
no vote
Other
Earn points
Uart-gen.rar, is about 1 asynchronous communication in the internal loop test is no problem, the logic should be basically no problem. But if it turns out to be an external communication, look at the data inputs and outputs.
verilog
uart-gen.rar
Related Source Codes
Axi slave to fifo code
0
0
no vote
LDPC code
0
0
no vote
ascii_ ieee754
0
0
no vote
Verilog key shake elimination
0
0
no vote
Basic asynchronous FIFO design
0
0
no vote
No comment