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DE2 practice source 2-3
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Part III
Figure 2a shows a circuit for a full adder, which has the inputs a, b, and ci, and produces the outputs s and co.
Parts b and c of the figure show a circuit symbol and truth table for the full adder, which produces the two-bit
binary sum cos = a + b + ci. Figure 2d shows how four instances of this full adder entity can be used to design
a circuit that adds two four-bit numbers. This type of circuit is usually called a ripple-carry adder, because of
the way that the carry signals are passed from one full adder to the next. Write VHDL code that implements this
circuit, as described below.
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DE2 practice source 2-4
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Part IV
In part II we discussed the conversion of binary numbers into decimal digits. It is sometimes useful to build
circuits that use this method of representing decimal numbers, in which each decimal digit is represented using
four bits. This scheme is known as the binary coded decimal (BCD) representation. As an example, the decimal
value 59 is encoded in BCD form as 0101 1001.
You are to design a circuit that adds two BCD digits. The inputs to the circuit are BCD numbers A and B,
plus a carry-in, cin. The output should be a two-digit BCD sum S1S0. Note that the largest sum that needs to be
handled by this circuit is S
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DE2 practice source 2-1
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Part I
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DE2 practice source 2-2
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2 the first part of the experiment FPGA DE2 development boards VHDL hardware language source code
Part II
You are to design a circuit that converts a four-bit binary number V = v3v2v1v0 into its two-digit decimal equivalent
D = d1d0. Table 1 shows the required output values. A partial design of this circuit is given in Figure 1. It
includes a comparator that checks when the value of V is greater than 9, and uses the output of this comparator
in the control of the 7-segment displays. You are to complete the design of this circuit by creating a VHDL entity
which
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