No self-introduction
Loading
Profile
Follow
codes (1)
1K SRAM seperate read and write ports, verilog cod
4.0
1K SRAM, arranged as words of 32 bit, seperate read and write ports, verilog code for ASIC design using even parity on count of 1's. also comes with testbench
gucci1029936535 0 0
1
No more~
Follows0
Fans0